Missing features for Kintex7 slow control

• Reconnect mechanism after loosing connection to the FPGA (or after rebooting the FPGA/updating the gateware)
• implement SEM commands
• Possibility to read back link mask from FPGA
• break condition for while fsm busy loop when uploading HVMAPS configuration to FPGA

Related to libpndlmddaq_dcsfee#2